• Breaking News

    Wednesday, December 16, 2020

    Hardware support: PlayStation 5 scalpers made more than US$19 million profit on the console via eBay with the PS5 Digital Edition reaching over 350% MSRP

    Hardware support: PlayStation 5 scalpers made more than US$19 million profit on the console via eBay with the PS5 Digital Edition reaching over 350% MSRP


    PlayStation 5 scalpers made more than US$19 million profit on the console via eBay with the PS5 Digital Edition reaching over 350% MSRP

    Posted: 15 Dec 2020 03:39 PM PST

    AMD RX 6800 XT runs at almost half the frame rate of Nvidia's RTX 3080 in Vulkan Ray Tracing tests

    Posted: 15 Dec 2020 05:18 PM PST

    TMSC Is Reportedly Terminating Discounts and Increasing Prices

    Posted: 15 Dec 2020 06:44 PM PST

    48gb RTX A6000 released

    Posted: 15 Dec 2020 08:51 AM PST

    [ComputerBase (GER)]New Optane products: P5800X becomes fastest PCIe 4.0 x4 SSD according to Intel

    Posted: 15 Dec 2020 12:25 PM PST

    [Meta] Why has this 50+ comment sub-thread been deleted?

    Posted: 16 Dec 2020 01:42 AM PST

    In yesterdays popular thread: https://www.reddit.com/r/hardware/comments/kdhbe8/oversupply_to_continue_affecting_nand_flash/

    Top comment (and all the subcomments) has been deleted: https://i.imgur.com/4Z9FsfN.png

    It didn't violate any rules, reddiquette, not off-topic, anything.

    submitted by /u/anatolya
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    [VideoCardz] AMD Ryzen 7 5800H spotted at Geekbench, 250-300 MHz faster than 4800H

    Posted: 16 Dec 2020 12:40 AM PST

    (Khronos) Vulkan SDK, Tools and Drivers are Ray Tracing Ready

    Posted: 15 Dec 2020 07:25 AM PST

    The Best PC Hardware of 2020! - Optimum Tech

    Posted: 15 Dec 2020 08:39 AM PST

    Apple's M1 Chip Benchmarks focused on the real-world programming

    Posted: 15 Dec 2020 08:47 AM PST

    Ampere Altra Performance Shows It Can Compete With - Or Even Outperform - AMD EPYC & Intel Xeon

    Posted: 16 Dec 2020 12:50 AM PST

    Rockchip RK3566 and RK3568 datasheets and features comparison

    Posted: 16 Dec 2020 12:46 AM PST

    Team Group validating consumer grade DDR5 RAM

    Posted: 15 Dec 2020 03:28 AM PST

    Modern Standby - Mature?

    Posted: 15 Dec 2020 02:30 PM PST

    Just curious what people's experiences have been. Do you think Modern Standby (S0 Low Power) is mature enough? Seems like the industry is headed towards it being a standard with more and more models popping up with it.

    submitted by /u/nkasco
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    Is my processor speed any good?

    Posted: 16 Dec 2020 02:12 AM PST

    So it's a Ryzen 5 3550H and it runs at 2100 MHz, how fast is that on a scale of 1-10?

    If I'm totally in the wrong place to be asking this kind of question give me abuse and tell me to get f'd lol.

    submitted by /u/h1tmanc3
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    [AHOC] DDR4 5500 feat. Crucial Ballistix RAM, MSI B550 Unify X and a Ryzen 4750G

    Posted: 15 Dec 2020 03:25 AM PST

    How can components have cycle lengths (1/clockrate) that are shorter than the time it takes light to traverse the component? RAM in particular.

    Posted: 15 Dec 2020 03:59 AM PST

    Light takes 500ps to travel 15cm, roughly the length of a ram stick, yet many ram sticks (including the ones in the computer I'm posting this from) have clock rates so high that a single cycle is significantly less time than that.

    How is this possible? To truly be "random access" you'd need to able to access any part of the memory on any clock cycle, so is that just not quite true or is there something else going on?

    Apologies if this is not the place for this question. It's more of a computer architecture question but r/computerarchitecture is tiny, dead, and full of schoolwork questions.

    Alternatively, where would be a better place to ask/where would be a good place to read about this?

    Thanks!

    submitted by /u/I_Say_Fool_Of_A_Took
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    x86 Micro ops and Rosetta 2

    Posted: 15 Dec 2020 04:03 AM PST

    Modern x86 cpus have a frontend to translate the x86 instructions to micro operations. I've been wondering if Apple's Rosetta 2 compatibility layer can be seen as a software implementation for an x86 cpu's frontend. If Rosetta could be seen in such a way then surely a hardware implementation would be even faster.

    Would it make sense for AMD or Intel to design an x86 cpu where the micro ops would be ARM or RISC-V instructions? They would have to design the core itself once and could sell CPU's with and without an x86 frontend. Or are the micro ops specifically designed for x86 instructions which would make moving to a different general purpuse instruction set illogical.

    submitted by /u/STR_Warrior
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