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    Hardware support: (GN)Get It Together, NZXT: BLD PC Undercover Review as a Real Customer

    July 20, 2020

    Hardware support: (GN)Get It Together, NZXT: BLD PC Undercover Review as a Real Customer

    (GN)Get It Together, NZXT: BLD PC Undercover Review as a Real Customer

    Posted: 19 Jul 2020 04:12 PM PDT

    How does AMD get such good performance out of their multi-chip 'chiplet' design, when in general similar multi-chip attempts in the past have had larger performance bottlenecks?

    Posted: 19 Jul 2020 09:51 AM PDT

    So it was my understanding that previous attempts in the past to use multiple chips in the same processor has generally resulted in worse performance and higher power consumption?

    How can they remain competitive or even often beat Intel's monolithic dies when e.g. core count, base/boost clock. fab node, and cache are all almost the same?

    Is this multi-chip design also the reason that their CPUs are currently so cheap compared to Intel's?

    What is it about the Zen architecture that allows this?

    submitted by /u/Lost4468
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    Game Dev Patches Mysterious AMD Ryzen 'Black Blob' Issue in Mass Effect

    Posted: 19 Jul 2020 01:03 PM PDT

    EVGA Introduces Precision for Game Bar BETA

    Posted: 19 Jul 2020 05:22 PM PDT

    Where would future density improvements come from for SSDs?

    Posted: 19 Jul 2020 05:15 PM PDT

    SSDs have been slowly dropping in price albeit much slower than everyone would like. I've been looking at future technologies and I can't find anything coming in the future that would give a viable way to significantly drop costs.

    Current tech maxes out at 4 bits per cell( QLC) and that comes with significant sacrifices in terms of endurance and performance, with Samsung's QVO line being beaten by HDDs in some benchmarks after the cache is exhausted. So extra bits per cell don't seem like a viable way forward.

    3D stacking seems to have slowed down significantly as well. I remember a few years ago when 3D NAND was new Samsung said the max they could go would probably be ~100 layers. They recently announced 140 layers and that seems to have slowed down too and I don't know if we'll see a significant number of layers added on top of that.

    More capacity can be added by stacking more dies however that also seems to cap at a few dies at best due to cooling issues and with extra costs per die added.

    More capacity per drive can be offered by cramming as many chips as possible but that quickly reaches eye watering prices and escapes the consumer/enthusiast market.

    The effect of this slowdown can be seen on what's available: Samsung's EVO and PRO lines haven't had a bump in their max capacity for a while. We are still in the single-digit TB capacity for consumer facing drives but those are QLC and still fairly expensive.

    I've searched online looking for potential new technologies that would enable the further reduction of ssd $/gb but I came up empty handed. What are your thoughts on what the future holds for ssds? Am I missing something?

    submitted by /u/Thedeos
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    Why aren’t cpus bigger?

    Posted: 19 Jul 2020 04:00 PM PDT

    I'm new to the whole building a pc thing. I've been thinking about building a rig for the new flight simulator but a few months ago I probably couldn't name the parts of a pc. So my question is: why aren't processors bigger? Surely they would be cheaper and more powerful if they were the size of a graphics card, especially in a pc where size of the machine doesn't really matter. Maybe I'm just dumb but this has been bugging me for a while.

    submitted by /u/GoldenRareRat
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    [LinusTechTips] This Sounds Too Good to be True - 1950W/(m*K) TIM (Panasonic's graphite sheet)

    Posted: 19 Jul 2020 09:56 AM PDT

    Cache: So we are using Cache-Lines that already have the data we are looking for. Why do we still need to search it in our caches?

    Posted: 19 Jul 2020 07:37 PM PDT

    I get the mechanisms of cache but not this one thing.

    In my lectures we are using Cache-Lines that are looking for the data written in the Cache-Lines.

    What's the deal about this? Why not just using the cache line data?

    submitted by /u/Rapiz
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