Hardware support: AMD Gives Details on EPYC Zen4: Genoa and Bergamo, up to 96 and 128 Cores

In the AMD accelerated Data Center keynote, Lisa Su claimed that they "worked with TSMC to optimize 5 nanometer for high performance computing" and listed these figures over current TSMC N7

Density: 2x
Power efficiency: 2x
Performance: 1.25x

Source

According to official TSMC figures N5 offers 1.8x logic density, -30% power or +15% performance improvement over N7. N5P has the same density and adds -10% power or +5% performance over N5. These numbers are a little different from AMD's 5nm claims and we have always assumed that AMD is planning to ship their new generation chips on the base N5 (not N5P)

How do you think that AMD came up with those figures? Have they worked with TSMC on an optimized and slightly different 5nm process for their designs?

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AMD Bergamo to hit 128 Cores and Genoa at 96 Cores

Posted: 08 Nov 2021 09:13 AM PST

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Anandtech: "NVIDIA Announces Jetson AGX Orin: Modules and Dev Kits Coming In Q1'22"

Posted: 09 Nov 2021 01:34 AM PST

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AMD Accelerated Data Center Premiere Keynote

Posted: 08 Nov 2021 08:31 AM PST

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Another OnePlus Nord 2 Allegedly Bursts Into Flames, User Suffers Heavy Burns

Posted: 08 Nov 2021 11:25 AM PST

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Is it me or is BT fundamentally flawed?

Posted: 08 Nov 2021 10:31 AM PST

Poor latency, lots of spectrum overlap (AKA interference with most everything else from wifi to microwave ovens to powerlines, cell towers etc...), five major versions in and only barely getting to the point it's usable for the things we are trying to use it for.

Why keep grafting hifi/low power etc. to what seems to be a poor base? Why not bin it and start over?

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VideoCardz: "Upcoming Minisforum MiniPC to feature up to Ryzen 9 5900X CPU, packs dedicated GPU too"

Posted: 09 Nov 2021 12:09 AM PST

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AMD Instinct MI200 Adopts OAM and a 4.9x Speedup Over NVIDIA A100

Posted: 08 Nov 2021 09:11 AM PST

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Alder Lake E cores violate modularity

Posted: 08 Nov 2021 09:37 AM PST

A lot of reviewers touched on this already but just to reiterate: Intel's heterogeneous processing implementation fundamentally alters the way CPUID data is reported and in doing so breaks a lot of x86 software.

From a code maintenance and overall x86 ecosystem perspective this is a pretty iffy move from Intel - best practice when you introduce heterogeneous processing is to add new instructions, not hackishly redefine the behavior of existing ones.

CPUID, hash and bitwise operations all work differently than expected. https://i.imgur.com/5sceKNe.jpg

Intel is taking the position that this is a feature, not a bug and essentially handing off the problem to developers.

I hope the performance/efficiency boost is worth it because there are going to be quite a few frustrated end users and IT guys/devs putting out fires this generation.

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NVIDIA Quantum-2 Takes Supercomputing to New Heights, Into the Cloud

Posted: 09 Nov 2021 12:39 AM PST

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AMD Milan-X Scaling to 0.75GB Of L3 Cache Per Chip

Posted: 08 Nov 2021 09:12 AM PST

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NVIDIA DRIVE Hyperion Combines Orin With Best-in-Class Sensor Architecture for Production-Ready Platform

Posted: 09 Nov 2021 01:59 AM PST

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TechTechPotato (Dr Ian Cutress): "Intel Buys x86 Chip Maker.... Kind Of"

Posted: 08 Nov 2021 10:24 AM PST